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Intel will return to multi-die processors in 10nm Xeon Sapphire Rapids generation
Intel representatives consistently reported on progress in mastering the most advanced version of the 10nm process technology, which was designated Enhanced SuperFin. To date, there is evidence of shipments to customers of all three major products using this technology, from consumer Alder Lake to server Sapphire Rapids. One of the last appeared in the photo, thanks to which you can study its design.
Image source: ServeTheHome
Already in preparation for the announcement of 10nm Ice Lake-SP processors, Intel faced layout problems: monolithic crystals do not allow accommodating a large number of cores, a competitor in this sense is ahead of Intel not only in terms of the lithography used (7nm), but also by the number of processor cores in the server segment (up to 64 pieces per one processor socket).
Industry experts have expressed the opinion that Intel will have to make Sapphire Rapids server processors multichip, even taking into account the use of a progressive version of the 10nm process technology. For example, if Intel wanted to release a 10nm Ice Lake-SP processor with 42 cores, then the die area would increase to 640 mm2. Such a large crystal is not only more expensive to manufacture, it has a higher probability of defects.
Image source: ServeTheHome
Photos of the 10nm Intel Sapphire Rapids processor performed by LGA 4677 appeared on the pages of the ServeTheHome forum. They suggest that two crystals are located on a common substrate. This is noticeable both in the relief of the metal cover and in the characteristic arrangement of the contact pads on the reverse side of the printed circuit board, although the latter is also used by existing processors with a single monolithic crystal. It is much more important that the capacitors in the central part of the PCB are divided into two groups; models with a single crystal have only one group of capacitors.
Sapphire Rapids are due late next year, offering Golden Cove microarchitecture with support for AMX extensions, DDR5 memory controller and PCI Express 5 interface controller.0 with CXL 1 protocol support.one. The 10nm version of the Enhanced SuperFin process technology will also produce Xe HP accelerators, recently showcased by Intel Senior Vice President Raja Koduri.